1. Field of the Invention
This invention relates generally to method, structure, and layout for measuring bridge induced by amendment of mask layout.
2. Description of the Prior Art
Because pattern transferring process usually could not completely transfer pattern of mask into photoresist, and because consumption is not unavoidable during developing process and etching process. Practical patterns in and on substrate usually are different to patterns of mask, and following defects are unavoidable: end rounding, end shorting, corned rounding, critical dimension offset, and bridging phenomena.
Thus, in order to cancel previous defects in practical semiconductor fabrication, mask layout amendment, such as optical proximity correction (OPC), usually is performed after layout pattern is formed and before layout pattern is transferred. Moreover, because pattern of substrate usually is shorter/thinner than pattern of mask or is deformed, mask layout amendment usually widens/lengthens real required patterns of mask or adds auxiliary pattern(s) in neighborhood of real required patterns, to cancel the difference between substrate pattern and mask pattern, to let substrate pattern is equal to real required pattern of mask before mask layout pattern is performed. Furthermore, because mask pattern at least includes numerous elements in practical semiconductor fabrication, mask layout amendment almost is performed by computer in accordance with predetermined rule(s) and predetermined parameter(s). Hence, although both rule(s) and parameter(s) could be adjusted by the operator(s), but operator(s) could amend individual element whenever rule(s) and parameter(s) are determined.
Significantly, because critical dimension of semiconductor devices is continuously decreased and density of semiconductor devices is continuously increased, bridge (bridging phenomena) induced by amendment of neighboring patterns also is continuously increased. Refers to FIG. 1A, FIG. 1B, FIG. 1C, and FIG. 1D, which show relation between real required pattern 10 and amended pattern 11, where FIG. 1B is the case no bridge happens and FIG. 1D is the case bridge happens. Reasonably, because bridge is the side effect during real required pattern 10 is changed into amend pattern 11, appearance of bridge usually could not be eliminated during sequentially pattern transferring process and etching process. An then, undesired bridge usually appears in and on substrate, such as bridge between gate pattern (for forming gate) and neighboring contact pattern (for forming contact) or bridge between gate pattern of one transistor pattern and gate pattern of neighboring transistor pattern, and induces disadvantages such as abnormal short.
Therefore, how to certify no undesired bridge is induced by amendment of mask layout pattern is an indispensable part of mask layout amendment. For well-known technology, because distance between neighboring transistor is obviously larger than distance between gate and contacts of one transistor, also because gate of each transistor is obviously separated from gates of other transistors for popular layout, only bridge between gate and contacts which locates besides this gate is measured, refers to FIG. 2A, FIG. 2B, and FIG. 2C.
Initially, FIG. 2A shows the transistor which should be formed. Layout of the transistor at least includes gate 21 and contacts 22, which locate beside gate 21 and on device area 20 of mask. To check whether such transistor layout could be properly formed without bridge, pattern similar to FIG. 2A is formed on mask as FIG. 2B shows, approximated gate pattern 23 ad some approximated contact patterns 24 are formed on amended device area 205 of mask. Herein, configuration of both approximated gate pattern 23 and approximated contact patterns 24 is essentially similar to the configuration of both gate 21 and contacts 22, but the scale and relative distance could be different. Next, pattern shown in FIG. 2B is amended, such as optical proximity correction, and then amended pattern is transferred into substrate 25 to form gate 26 and some contacts 27, as FIG. 2C shows. Herein, to emphasize how to measure bridge, only the case that some bridge occurs for closing gate 26 and contact 27 is shows. Afterward, electrically couples contacts 27 with a terminal, and then applies an electric signal on gate and measure whether this electrical signal appears on this terminal. Indisputably, electrical signal appears on terminal indicates that at least one contact 27 bridge with gate 26, and then it is necessary to amended approximated gate pattern 23 and approximated contact patterns 24 of FIG. 2B. Of course, it also could be viewed as this transistor layout could not be formed by current mask layout amendment or current mask layout amendment must be improved.
Surely, amendment of FIG. 2B not only requires message(s) about whether bridge is happened but also requires message(s) about what distance between gate 21 and contact 22 could prevent occurrence of bridge. Thus, as FIG. 2D shows, the popular solution is to form a mask layout pattern which connects several stimulated gate patterns 29 by one conductor line pattern 28. Herein, each stimulated gate pattern 29 is briefly similar to, or even equal to, other stimulated gate patterns 29, and each stimulated gate pattern 29 corresponds to several stimulated contact patterns 295 which are located beside it. Moreover, the distance between one stimulated gate pattern 29 and corresponding stimulated contact patterns 295 is different from the distance between each other stimulated gate pattern 29 and corresponding stimulated contact patterns. Clearly, after mask layout amendment and pattern transferring process, gates 26 and contacts 27 are formed on substrate 295 and are corresponding to stimulated gate patterns 29 and stimulated contact patterns 295. In this way, by measuring which gate 26 has bridge(s) with corresponding contact(s) 27 and which gate 26 has no bridge with corresponding contact 27, it is clear which stimulated gate pattern 29 and corresponding stimulated contact pattern 295 could to indicate both gate 21 and contacts 22 on mask, and could be ensure correctly pattern transfer without bridge.
However, owing to density of semiconductor devices is continuously increased and layout of semiconductor devices also is continuously evolved, not only distance between neighboring transistors approaches to the distance between gate and contacts of same transistor, but also gate of each semiconductor devices is closed to gates of other semiconductor devices, such as static random access memory. Thus, conventional technology which only measures bridge between gate and contacts of same transistor could not handle all possible bridge. For example, while pattern to be formed is similar to FIG. 2A but gate 21 is longer than FIG. 2A, as FIG. 2E shows, it is possible that terminal of gate 26 is widen or is like a hammerheads, which usually called as endcap phenomena, although no bridge is happened. Obviously, whenever two neighboring transistors are so closed to let they can not be separated during mask layout amendment, it is possible that gate of one transistor has bridge with gate of neighboring transistor, as FIG. 2F shows. Of course, FIG. 2F only shows one possible bridge, it also could be bridge between gate of one transistor and contact(s) of neighboring transistor, and also could be bridge between contact(s) of one transistor and contact(s) of neighboring contact(s).
As a summary, conventional technology only could measure bridge induced by both deformation of gate and deformation of contact(s) of same transistor during mask layout amendment, bit could not handle bridge induced by other reasons. Therefore, it is desired to amend conventional technology to correctly handle all possible bridge and to ensure accuracy of mask layout.
According to previous defects of conventional technology, one main object of this invention is to provide a method for handling all possible bridges.
One preferred embodiment of this invention is a method for measuring bridge induced by mask layout amendment. First, provide a mask with a layout that comprises a conductor line pattern, numerous gate patterns which are connected with conductor line pattern, and numerous contact pattern groups, each contact pattern group has numerous contact patterns and at least surrounds one terminal, which does not contact with conductor line, of one corresponding gate pattern. Then, amend this layout and transfer amended layout into a substrate to form a conductor line, numerous gates and numerous contact groups in and on this substrate. Finally, electrically couple these contact groups with a terminal, then, apply an electrical signal into this conductor line and measure whether the electrical signal appears at this terminal.
Another preferred embodiment is a layout for measuring deformation of gate pattern which induced by layout amendment, at lest includes a conductor line pattern, numerous gate patterns which connects with conductor line pattern, and numerous contact pattern groups. Herein, each contact pattern group is separated with other contact pattern groups and is corresponding to one gate pattern, and has numerous contact patterns that surround one terminal which does not contact with conductor line pattern of gate pattern.
Yet a preferred embodiment is a structure for measuring bridge between gate and contact, at least includes gate which is located on a substrate, dielectric layer which covers both substrate and gate, numerous contacts which are located in dielectric layer and contacted with substrate. These contacts at least surround part of gate and each contact is separated from other contacts. And Conductor layer is located over dielectric layer and electrically coupled with contacts.